and is looking to add to the team that will prototype and field-test the technologies. Required Skills: 1. Strong VHDL (preferred)/Verilog... Design 6 years Programming FPGA Programming 6 years VHDL / Verilog 6 years Signal Processing Digital Signal Processing...
’s (i.e Verilog, VHDL). Preferred Additional Skills: Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM.... Microsemi / Actel is our targeted FPGA and QuestaSim is our simulation tool. The primary responsibilities will focus on Verilog...
Intermedia Group, Inc. ⚡ $142000 - 161000 per year ⚡ Wed, 08 Jul 2026 07:03:07 GMT
to obtain a U.S. secret clearance Desired Skills and Experience · VHDL and/or Verilog experience · C/C++ knowledge · Radio... with schematic capture tools such as Mentor Graphics DxDesigner. Designing VHDL code for FPGAs (Altera/IntelPSG and/or Xilinx...
to obtain a U.S. secret clearance Desired Skills and Experience · VHDL and/or Verilog experience · C/C++ knowledge · Radio... with schematic capture tools such as Mentor Graphics DxDesigner. Designing VHDL code for FPGAs (Altera/IntelPSG and/or Xilinx...
speed digital interfaces (PCIE, JESD, Aurora, N-Gbps Optical, etc) Proficient in HDL design using VHDL and/or Verilog..., engineers to bring up state of the art boards for software defined radios Responsible for design and test of VHDL DSP modules...
+ years of experience in embedded systems development. Experience with Xilinx FPGAs: including experience with Vivado, VHDL... or Verilog, and embedded processor cores (e.g., MicroBlaze, Zynq). Proficiency in C/C++ with a strong understanding of memory...
clearance Hands-on experience with RTL design, coding, and simulation using VHDL and/or Verilog At least 5+ years experience... and executing RTL verification testbenches using VHDL or SystemVerilog Proficiency with ASIC and/or FPGA simulation, synthesis...
, and Concept of Operations (CONOPS) Translate system level requirements into FPGA requirements Design and code in VHDL... or Mathematics (STEM) and a minimum of 8 years of prior relevant experience Demonstrated experience with digital design and VHDL...
Infrastructure Technology Lead, Senior Vice President
, Rust, VHDL, Verilog) Time Sync (PTP, NTP, GPS, White Rabbit, SyncE) Wave (RF, Millimeter, Microwave, DWDM, Photonics...
Citigroup ⚡ ⚡ Thu, 09 Jul 2026 01:23:53 GMT