hardware. Perform requirements analysis and detailed design; Develop HDL code (VHDL/Verilog/SystemVerilog), simulation... of experience in VHDL FPGA logic design and development; Experience with FPGA tools and embedded systems; Familiar with digital...
(VHDL/Verilog/SystemVerilog), timing closure, and block design development are essential. This role involves driving FPGA... implementation (Verilog/VHDL), verification, and system integration across multiple FPGA families. Define and document FPGA...
requirements into FPGA design specifications Develop RTL code (e.g., VHDL/Verilog/SystemVerilog) and support simulation... (RTL design, simulation, synthesis, and debug) Exposure to hardware description languages (VHDL or Verilog) Strong...
benches using VHDL or System Verilog Performing trace requirements as well as performing review and audits on the simulation... of experience; or a STEM PhD. degree with 1+ years of experience Experienced in RTL (VHDL or Verilog) design for space...
Northrop Grumman ⚡ $125300 - 187900 per year ⚡ Wed, 29 Jul 2026 22:21:21 GMT
(such as SynopsysZeBu, Mentor Veloce, Cadence Palladium, or similar). Strong knowledge of hardware description languages (Verilog...,SystemVerilog, VHDL) and verification methodologies (UVM, OVM). Proficiency in debugging and optimizing complex hardware...
Synopsys ⚡ $112000 - 168000 per year ⚡ Wed, 29 Jul 2026 07:35:42 GMT
requirements into FPGA design specifications Develop RTL code (e.g., VHDL/Verilog/SystemVerilog) and support simulation... (RTL design, simulation, synthesis, and debug) Exposure to hardware description languages (VHDL or Verilog) Strong...
analysis Experience performing analog, digital, and/or RF design, or VHDL/Verilog development for FPGAs..., etc. Experience using schematic capture tools and interpreting schematics, or performing advanced FPGA firmware development (VHDL...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Wed, 29 Jul 2026 00:32:33 GMT
, Electrical Engineering, or related field - 3+ years experience with SystemVerilog, VHDL, Verilog - Good understanding... with simulation, functional verification, testbench creation and debug - Education or experience in Verilog/SystemVerilog...
Cadence Design Systems ⚡ $102900 - 191100 per year ⚡ Tue, 28 Jul 2026 23:47:48 GMT
AI/ML driven ASIC Design and Implementation Automation Engineer
and tool development Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design and layout...
NXP Semiconductors ⚡ ⚡ Thu, 30 Jul 2026 04:25:25 GMT