, simulation, and verification using VHDL and/or Verilog, including development of testbenches for RTL block verification using... tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Contribute to engineering...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Thu, 15 Oct 2026 04:19:12 GMT
and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. Proven ability... coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL...
Raytheon Technologies ⚡⚡ Thu, 15 Oct 2026 03:57:36 GMT
. 4+ years experience in digital logic design in SystemVerilog/Verilog/VHDL 4+ years experience running synthesis/static... development, and FPGA implementation. 5+ years of FPGA and RTL design experience Expertise in Verilog/System Verilog Expertise...
in Verilog or VHDL. Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure.... Experience in Testbench development for the verification of RTL blocks using System Verilog. Proficient using ASIC and/or FPGA...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Wed, 14 Oct 2026 23:43:13 GMT
synthesizable RTL using Verilog, SystemVerilog, and/or VHDL. Develop FPGA logic for functions such as PWM generation, digital... development. Preferred Qualifications: Professional experience developing synthesizable RTL using VHDL, Verilog...
Eaton ⚡ $80000 - 118000 per year ⚡ Wed, 14 Oct 2026 23:26:26 GMT
for a security clearance RTL coding and simulation in VHDL or Verilog Digital circuit architecture, design, resource tradeoffs..., timing analysis and timing closure Testbench development for the verification of RTL blocks using VHDL or System Verilog...
Raytheon Technologies ⚡⚡ Wed, 14 Oct 2026 22:28:10 GMT
, and participate in technical discussions Preferred skills Experience with a hardware description language such as Verilog..., SystemVerilog, or VHDL Experience with Python, Perl, Tcl, or another scripting language Experience working in Linux development...
Hewlett Packard Enterprise ⚡⚡ Wed, 14 Oct 2026 22:27:53 GMT
in VHDL/Verilog and System Verilog implementation. Verification & Quality: Oversee the flow-down of system/subsystem... and Mentor Modelsim/Questasim. Languages: Expertise in VHDL, Verilog, and System Verilog. Hardware Knowledge: Strong background...
Principal Electrical Engineer - DSP ASIC/FPGA (Onsite)
is required. Strong expertise in Simulink and/or MATLAB for modeling and simulation of DSP systems. Proficient in VHDL/Verilog for FPGA...
Raytheon Technologies ⚡ ⚡ Thu, 15 Oct 2026 07:31:20 GMT