FPGA Verification Engineer II
including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP... Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP...
FPGA Verification Engineer II
including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP... Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP...
CesiumAstro ⚡ ⚡ Fri, 25 Sep 2026 02:33:27 GMT