designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. Demonstrated ability to work... tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Recommend new tools...
and simulation in VHDL or Verilog Testbench development for the verification of RTL blocks using VHDL and/or SystemVerilog... tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL...
Raytheon Technologies ⚡ $68900 - 131100 per year ⚡ Sat, 04 Jul 2026 02:08:43 GMT
, and Concept of Operations (CONOPS) Translate system level requirements into FPGA requirements Design and code in VHDL... or Mathematics (STEM) and a minimum of 8 years of prior relevant experience Demonstrated experience with digital design and VHDL...
experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment... for the verification of RTL blocks using VHDL or SystemVerilog Collaborate with design engineers in the integration...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Fri, 03 Jul 2026 22:52:22 GMT
clearance At least 3+ years e experience in RTL coding and simulation in Verilog or VHDL. Experience in digital circuit... verification of RTL blocks using System Verilog. Proficient using ASIC and/or FPGA simulation and synthesis tools (e.g., ModelSim...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Fri, 03 Jul 2026 04:58:25 GMT
following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) Experience... engineers and code in VHDL for reliability and maintainability Verify designs utilizing self-checking techniques with directed...
Raytheon Technologies ⚡⚡ Fri, 26 Jun 2026 06:12:15 GMT
experience. Experience to include one or more of the following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC... in VHDL for reliability and maintainability Verify designs utilizing self-checking techniques with directed and constrained...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Fri, 26 Jun 2026 03:10:43 GMT
Principal FPGA/ASIC Verification Engineer (Onsite)
designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. Demonstrated ability to work... tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Recommend new tools...
Raytheon Technologies ⚡ ⚡ Sat, 04 Jul 2026 04:01:18 GMT