the micro-architecture based on the IP requirements Develop RTL using Verilog/SystemVerilog/VHDL based on micro... Strong experience in RTL design (Verilog/SystemVerilog/VHDL) Solid understanding of SoC/IP design and integration Hands-on experience...
NXP Semiconductors ⚡⚡ Thu, 11 Jun 2026 00:10:14 GMT
: Synplify, Vivado, XILINX ISE, Work experience in Xilinx FPGA based design implementation. FPGA RTL coding(Verilog/VHDL.../System Verilog), FPGA constraint setup, verification, synthesis, par and timing closure. Hands-on experience in WIFI...
is a plus. Programming/scripting: MATLAB and/or C++; Python for automation and data analysis preferred. Basic familiarity with HDLs (Verilog.../VHDL) and co-simulation concepts. Comfortable with data analysis, plotting, and writing clear, concise technical reports...
Verilog, and VHDL coding practices. Experience in UVM Verification framework, Assertion based Verification, Code coverage.... Here's what we are looking for with this role: Essential Requirements Experience: 3-5 years in FPGA systems design and verification with Verilog coding, System...
especially using System Verilog Have knowledge of firmware and RTL design (VHDL/Verilog) Ideally have knowledge of Cadence... Verification Methodology (UVM) draw on test scenarios using System Verilog verify functionality using the Constrained Random...
, Verilog, and VHDL RTL design experience Chip/ASIC design or verification experience with knowledge of SystemVerilog.../Verilog/VHDL language, RTL, behavioral coding, and general ASIC debug Previous experience with industry simulation...
Principal Digital IP Engineer
the micro-architecture based on the IP requirements Develop RTL using Verilog/SystemVerilog/VHDL based on micro... Strong experience in RTL design (Verilog/SystemVerilog/VHDL) Solid understanding of SoC/IP design and integration Hands-on experience...
NXP Semiconductors ⚡ ⚡ Thu, 11 Jun 2026 00:10:14 GMT