FPGA Lead Designer
+ years of relevant experience Experience with Xilinx/Altera FPGAs and hands on with Verilog/VHDL, C/C++, Python and tools... techniques, Skilled in FPGA verification Scripting: Perl, Python, UNIX shell, Makefile. Coding Languages: Verilog, System...
FPGA Engineer
pipelines Design and implement DDC/DUC architectures for wideband signal capture Develop RTL pipelines (VHDL/Verilog) for high... design (VHDL/Verilog/SystemVerilog) Python, MATLAB, C/C++ for modeling and validation Understanding of real-time systems...
Xovian Aerospace Pvt. Ltd. ⚡ ⚡ Tue, 26 May 2026 22:20:22 GMT