to start date RTL coding and simulation in VHDL or Verilog Testbench development for the verification of RTL blocks using... coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL...
Raytheon Technologies ⚡ $75800 - 144200 per year ⚡ Thu, 04 Jun 2026 05:19:26 GMT
and system level architectures with Verilog and/or VHDL Develop simulations for modules and systems Synthesizes Verilog... record to design and implement FPGA modules using Verilog and/or VHDL with simulation and testbench development Familiarity...
methodologies such as UVM, OVM or VMM. HDL programming experience with VHDL, Verilog, and/or SystemVerilog. Desired skills.... To be effective in this role, you will need: UVM expertise SystemVerilog and VHDL mastery You need to be an independently minded...
Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development... coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL...
Raytheon Technologies ⚡⚡ Sun, 31 May 2026 07:41:54 GMT
and principles, logic design and architecture and experience with HDL's (i.e Verilog, VHDL). Preferred Additional Skills... primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller...
Central Business Solutions ⚡ $142000 - 161000 per year ⚡ Sun, 31 May 2026 05:52:23 GMT
, simulation, and verification using VHDL and/or Verilog, including development of testbenches for RTL block verification using... tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Contribute to engineering...
Raytheon Technologies ⚡ $86800 - 165200 per year ⚡ Sun, 31 May 2026 05:40:30 GMT
and principles, logic design and architecture and experience with HDL’s (i.e Verilog, VHDL). Preferred Additional Skills... primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller...
Central Business Solutions ⚡ $142000 - 161000 per year ⚡ Sun, 31 May 2026 04:49:50 GMT
for the verification of RTL blocks using VHDL or System Verilog. Proficiency using ASIC and/or FPGA simulation and synthesis... date U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance RTL coding and simulation in VHDL...
Raytheon Technologies ⚡⚡ Sun, 31 May 2026 02:04:04 GMT
-to-day Design FPGA module and system level architectures with Verilog and/or VHDL Develop simulations for modules... and systems Synthesizes Verilog and/or VHDL to FPGA products Develop timing constraints, analyze timing results, and implement...
Principal/ Sr. Principal FPGA Design Engineer
) of FPGA/ASIC design experience. In-depth knowledge of VHDL and/or Verilog -Proficiency in High level synthesis (Xilinx...
Northrop Grumman ⚡ $119600 - 179400 per year ⚡ Fri, 05 Jun 2026 22:18:10 GMT