experience. Experience to include at least 4 of the following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC... to determine parts, interfaces, and Concept of Operations (CONOPS). Design and code in VHDL for reliability and maintainability...
Raytheon Technologies ⚡ $68900 - 131100 per year ⚡ Sat, 19 Sep 2026 23:13:49 GMT
knowledge of complex topics such as VHDL, Verilog, SystemVerilog, UVM, SystemC, TLM, Formal and other emerging design... — using SystemVerilog and UVM (required for all candidates). VHDL and/or Formal verification — expert-level knowledge...
and layout guidelines. Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data... synthesizable RTL in SystemVerilog, Verilog, or VHDL. Hands-on experience with FPGA design suites and EDA tools (e.g., AMD/Xilinx...
experience in VHDL or Verilog. Strong DSP background using FPGAs. Digital filter design and DDS experience required. Experience..., integrate, and test digital systems specifically regarding FPGA (Field Programmable Gate Array) technology. Develop Verilog...
Simulation Technologies, Inc. ⚡⚡ Sat, 19 Sep 2026 22:08:28 GMT
Experience decomposing processing chains into component modules for development Experience developing synthesizable VHDL..., Verilog, and/or SystemVerilog Experience implementing FPGA designs in hardware, including the creation of constraint files...
MIT Lincoln Laboratory ⚡ $116400 - 140000 per year ⚡ Sat, 19 Sep 2026 22:01:56 GMT
deployment, debug, and performance optimization Deep proficiency in hardware description languages including Verilog..., SystemVerilog, and VHDL, with the ability to read, debug, and optimize RTL for emulation Strong understanding of verification...
in VHDL and/or Verilog for reading and understanding design RTL Experience with waveform debugging and signal-level analysis..., and functional coverage collectors using SystemVerilog, VHDL and UVM Drive code coverage (statement, branch, condition, expression...
is required. Responsibilities for this Position What You'll Do Architect and implement high-performance FPGA designs in VHDL and/or Verilog... tools Required Qualifications Strong proficiency in VHDL and/or Verilog/SystemVerilog for synthesizable RTL design...
Experience decomposing processing chains into component modules for development Experience developing synthesizable VHDL..., Verilog, and/or SystemVerilog Experience implementing FPGA designs in hardware, including the creation of constraint files...
MIT Lincoln Laboratory ⚡ $116400 - 140000 per year ⚡ Sat, 19 Sep 2026 04:22:42 GMT
and layout guidelines. Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data... synthesizable RTL in SystemVerilog, Verilog, or VHDL. Hands-on experience with FPGA design suites and EDA tools (e.g., AMD/Xilinx...
Digital Hardware Engineering Lead
language (VHDL, Verilog) Familiarity with common FPGA, CPU, MCU, GPU devices and technologies. Familiarity with standard...
Anduril Industries ⚡ ⚡ Sun, 20 Sep 2026 01:13:14 GMT