following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding) Experience... and code in VHDL for reliability and maintainability Verify designs utilizing self-checking techniques with directed...
including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP... Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP...
experience. Experience to include at least 4 of the following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC... to determine parts, interfaces, and Concept of Operations (CONOPS). Design and code in VHDL for reliability and maintainability...
Raytheon Technologies ⚡ $68900 - 131100 per year ⚡ Sun, 20 Sep 2026 02:00:51 GMT
Staff Application Engineer
Veloce, or Cadence Palladium Strong working knowledge of Verilog, SystemVerilog, or VHDL and verification methodologies...
Synopsys ⚡ $112000 - 168000 per year ⚡ Fri, 02 Oct 2026 04:05:53 GMT