Lead Application Engineer - Design Verification
/improvement. Job Requirements: 4-6 or above years’ experience in the following areas: 1. Design experience in Verilog/VHDL... for IP or SoC chip level. 2. Verification with knowledge of System Verilog/VHDL and HDL simulators. 3. Experience...
Sales Applications Engineer
, and embedded systems. Proficiency with HDL languages (VHDL/Verilog) and experience with FPGA design tools (e.g., Quartus Prime...
Altera ⚡ ⚡ Tue, 16 Jun 2026 00:44:15 GMT