Sr Principal Design Engineer
for synthesizing digital designs from RTL (Register Transfer Language) specifications (Verilog or VHDL) into netlists based on standard... Engineering. (PhD is a plus) Proven experience in hardware design with (System)Verilog. Solid programming skills in C++, Java...
Senior Electronics Engineer
design experience including VHDL / Verilog programming. Simulation of designs using Spice and/or RF simulators Experience...
Sagentia ⚡ ⚡ Mon, 09 Feb 2026 23:48:34 GMT