ASIC Engineering Digital Design Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 12-16 Years | Pune)
to production. Specific responsibilities include Lead all design activities from Pre-Silicon RTL to GDS2 signoff and Post... interfaces to tapeout and post-silicon production support, while overseeing the integration of digital logic with analog...
Senior SDET
environment readiness — dev, staging, UAT, pre-prod, prod. Build environment-health checks, configuration drift detection..., and smoke suites that gate every deploy. ● Own production sanity testing — synthetic call flows, heartbeat checks, post-deploy...
Deutsche Telekom Digital Labs ⚡ ⚡ Fri, 22 May 2026 22:08:39 GMT