Senior Soc Pre-Silicon Verification Engineer
description languages such as Verilog or VHDL and verification tools like UVM or System Verilog, or relevant experience in silicon... for innovation and a drive to contribute to industry‐leading solutions. 4+ years of System Verilog and UVM experience. 4+ years...
System Validation Engineer (Ai Accelerator Platform)
for system validation. Familiarity in reading and understand the RTL code (e.g. Verilog, VHDL) and use the knowledge in the...
Qualcomm ⚡ ⚡ Sun, 25 Oct 2026 22:51:47 GMT