in an Electrical or Computer Engineering degree program, or equivalent; Experience with Verilog, SystemVerilog, or VHDL...
Kepler Communications ⚡ $29.75 - 39 per hour ⚡ Fri, 24 Jul 2026 02:30:49 GMT
Vivado HLS, Intel HLS). Basic understanding of hardware description languages (Verilog/VHDL). Experience with version...
Altera ⚡ $100000 - 130000 per year ⚡ Thu, 23 Jul 2026 04:12:44 GMT
and Cadence Good knowledge and understanding in Verilog/VHDL and SystemVerilog Exposure to CAD and automation. Good exposure...
Qualcomm ⚡ $89600 - 134400 per year ⚡ Fri, 03 Jul 2026 22:13:06 GMT
in Verilog/VHDL and SystemVerilog Exposure to CAD and automation. Good exposure for using de-Perl techniques in creating generic...
Qualcomm ⚡ ⚡ Wed, 01 Jul 2026 02:57:40 GMT
algorithms to convert RTL (Verilog/SystemVerilog/VHDL) into efficient gate-level representations. Compiler Toolchain...-on experience with: Verilog/SystemVerilog or VHDL RTL design and synthesis flows Technical Skills: Proficiency in C/C...
Altera ⚡ $129100 - 187000 per year ⚡ Fri, 05 Jun 2026 04:11:04 GMT
What You'll Need Strong background with multi-year and multi-project experience in RTL SoC Design (Verilog/VHDL), and ASIC/FPGA...
Qualcomm ⚡ ⚡ Sat, 23 May 2026 07:02:50 GMT
Concepts digital logic timing analysis Verilog/VHDL coding and Lint tools Highly desirable skills: Experience with MAC...
Marvell ⚡ $145800 - 194400 per year ⚡ Thu, 07 May 2026 01:27:53 GMT
FPGA Digital Design Engineering Intern (January 2027) (4-16 months)
in an Electrical or Computer Engineering degree program, or equivalent; Experience with Verilog, SystemVerilog, or VHDL...
Kepler Communications ⚡ $29.75 - 39 per hour ⚡ Fri, 24 Jul 2026 02:30:49 GMT