Research Engineer
in SysML and AADL. Knowledge of hardware engineering languages and platforms such as VHDL, Chisel, Bluespec, SystemVerilog..., and Verilog. Security and Citizenship Requirement Active and transferable U.S. government issued security clearance...
Sr. Software Engineer (Teradyne, Oregon)
field Familiarity with Verilog, System Verilog, VHDL, UVM Experience with FPGA-based system debug or hardware validation...
Teradyne ⚡ $161700 per year ⚡ Wed, 25 Feb 2026 08:10:33 GMT