Working student: Evaluation of High-Level Synthesis Using the ASCON Encryption Algorithm
written in high-level programming languages, such as C or C++, into hardware description languages like Verilog or VHDL... like Verilog or VHDL. You analyze synthesis results, focusing on resource usage, timing, and throughput. Documentation...
Working Student/Internship – Digital Design & Signal Processing Architectures (f/m/div)
flows Proficiency with SystemC and HLS tools for hardware design Exposure to hardware description languages (VHDL, Verilog...
Infineon ⚡ ⚡ Thu, 08 Jan 2026 02:09:54 GMT